1. Field of the Invention
The present invention relates to integrated circuits, and more specifically to a Sub-Atmospheric Chemical Vapor Deposition (SACVD) application method for fabricating semiconductor integrated circuits and a corresponding deposition reactor.
2. Description of Related Art
Providing adjacent or overlapping dielectric material layers having the same composition is fairly common in today's electronic technologies, and at various stages of manufacturing integrated circuits. In order to form two-stack layers of this kind, it is standard practice to have a first layer of dielectric material partly or fully overlapped by a second dielectric layer. However, before forming the second layer, there can be intermediate process phases leading to the formation of a sacrificial layer which is then in part or fully removed. In any event, at the end of these process phases, the second dielectric layer will have its bottom surface directly in contact with the top surface of the first dielectric layer.
Dielectric materials, such as silicon oxide or nitride, are usually used either to provide electrical isolation between conductive layers or to protect underlying integrated circuit structures from contamination. A basic aim of two-stack dielectric layers is to ensure protection in the event that one of the layers becomes damaged. Therefore, it is important that in no portion of the two-stack layer is there left a doubtful adhesion between the overlapping layers.
Nevertheless, some materials have adhesion problems at the interface. These problems may originate from inherent characteristics of the material that are not yet fully understood by the experts. For example, it is believed that because of different thicknesses of the layers, stress situations which tend to delaminate the material can occur when such strain exceeds the molecular attraction force between the layers.
Contributing factors may be the total of the processing steps undergone by the semiconductor, or different processing temperatures. In addition, proper adhesion between the overlapping layers is difficult to achieve because of certain processing methods that are customarily used during the fabrication of integrated circuits.
Conventionally, the dielectric layers (except for the first one which can be formed by thermal oxidation) are usually formed by deposition techniques such as CVD (Chemical Vapor Deposition) performed inside a reactor. The chemical precursor of the element to be deposited is reacted during the gas phase. The chemio-physical properties of the layer are controlled by such processing parameters as pressure and the concentration of reactive gases like O3 and TEOS (TetraEthylOrtho-Silicate). However, the dielectric formed with the CVD method is often uneven through its thickness due to a sort of reactive inertia at the initial phase of the deposition. Furthermore, any residues left from previous processing phases on the surface of the first layer may interfere with the deposition and proper adhesion between the layers, especially when the dielectric materials happen to be markedly stiff (as is the case with silicon nitride and oxynitride).
Aimed at improving the adhesion between dielectric material layers, certain techniques have been developed in which the surface of the underlying layer is treated before forming the second layer. For example, a sputtering process phase of ion bombarding the surface of the first layer may be carried out to enhance adhesion of the reactants to be deposited. This is done, for example, with layers of silicon oxide deposited using TEOS as precursor.
Another viable approach is known as Sub-Atmospheric Chemical Vapor Deposition (SACVD), which consists of depositing a doped or undoped film of silicon oxide based on the combustive reaction of O2 and TEOS initiated by the presence of ozone (O3). Details of this technique can be found in K. Fujino et al., “Doped Silicon Oxide Deposition by Atmospheric Pressure and Low Temperature Chemical Vapor Deposition Using Tetraethoxysilane and Ozone,” Journal of the Electrochemical Society, Vol. 138, No. 10, October 1991, Manchester, N. H., U.S.A., pp. 3019-3024, which is herein incorporated by reference.
The peculiar feature of this deposition technique is a good gap-fill and excellent step coverage, which can be achieved by optimizing the deposition parameters. It has, however, a major limitation in its low throughput of no more than 6.5 wafers/hour. Furthermore, the use of ozone (O3) has several drawbacks: (1) it is a highly harmful gas; (2) the proportion of ozone is dictated by the limitations of the ozonizer power output; and (3) the TEOS flow cannot be increased to achieve a higher throughput without at the same time losing gap-fill. At process temperature, ozone undergoes almost complete dissociation already inside the reactive gas injection system (shower head) into O2 and O radicals which constitute radical initiators activating the combustion process.
It is known, from literature as well as from tests carried out by the Inventor, that the gap filling rate of the dielectric film improves with increased pressure and ozone proportion, and decreased TEOS flow rate. Unfortunately, equipment throughput proceeds in the reverse direction. Accordingly, raising the flow rate of TEOS while keeping the ozone ratio unaltered (for maximum gap filling performance) appears to be the most convenient course for getting a higher process capacity. However, this ideal setting has a limitation in the ability to maximize the ozone percentage with the ozonizers currently in use. These ozonizers can supply 17% ozone at most.